Extended Team Profile

Dominic Massetti

Dominic Massetti has over 30 years of industry experience spanning multiple applications of Integrated Circuit device and fabrication technology. Most recently he directed technology related assessments of intellectual property for IPValue Management. He mined and evaluated the patent portfolios of Fortune 500 high-tech companies. He previously served as Senior Director, VLSI Manufacturing Technology, for HDD industry leader Seagate Technology where he ensured mass market commercialization of state-of-the art IC fabrication technology.

Prior to that, he was Director of Technology Development & Quality Systems at Texas Instruments. There he developed and applied high speed analog BiCMOS manufacturing technologies to products used in high capacity storage systems, wireless communication components, and PC processor interfaces. Earlier in his career he developed CMOS logic and non-volatile memory technologies, and managed pilot fabrication lines at NCR Microelectronics and Philips Semiconductors.

He has been active in promoting nanotechnology by organizing forums and speaking on the subject. He has published related on-line articles for NanoInvestorNews. As an NSF peer reviewer he continues to support investments in small high tech businesses.

Mr. Massetti holds a Master of Science degree in Applied Solid State Physics from the University of California, San Diego. He also earned his Bachelor of Science degree in Physics.

Specialties:

High-tech patent analysis, assertion case prep, claim vs product attribute charts.
Prior art searches, reverse engineering, market analysis, IP valuation, inventor interviews.
Recent patent projects: IC I/O drivers, PC User Interface, MEMS, IC Fab processes, telecomm.
M&A pre-investment due diligence of IP.
IC device physics, fabrication processes.
Non-Volatile memory, MRAM, Flash.
Cu interconnects, Low K dielectrics, CMP, Photolithography, layer deposition, etching
Audit IC & MEMS fabrication facilities, processes, & reliability issue prevention
NSF Grant Peer Reviewer – SBIR Semi Manufacturing & Nanotechnology

Work Experience:

IPValue Management, Inc.
Seagate Technologies
PDF Solutions, Inc.
Texas Instruments
Philips Semiconductors

Education:

M.S. Solid State Physics, University of California, San Diego
B.S. Physics, St. Mary’s College of California

Professional Associations:

IEEE Senior Member
IEEE Electron Devices Society
IEEE Semiconductor Manufacturing Society
Founding Member, International Semiconductor Manufacturing Science Symposium, 1998
IEEE San Francisco Bay Area Nanotechnology Council, Secretary
UC Berkeley Nanotechnology Forum – Speaker, Poster paper judge
NSF SBIR proposal reviewer, Nanotechnology and Semiconductor Fabrication Panels

Publications:

Numerous technical publications, a patent, technical talks, and invited speeches on nanotechnology and semiconductors.